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Intel 3 Process Node Detailed: 18% More Performance At Same Power, 10% Higher Density, Shipping With Xeon 6 CPUs Now

Intel has detailed its next-gen Intel 3 process node which brings a solid 18% performance uplift over Intel 4 along with density improvements.

Intel 3 Adds An 18% Performance Uplift At the Same Power While Improving Transistor Density By 10%

The Intel 3 node is crucial for Chipzilla as it races towards its goal of delivering five nodes in four years. The Intel 3 node marks the mid-step in this journey with the Intel 7 and Intel 4 nodes already shipping in various products in the market and Intel 3 coming to customers with the Xeon 6700E "Sierra Forest" lineup which was launched at Computex 2024.

Related Story Intel Hits Back At AMD’s Data Center AI Performance Claims: Says 5th Gen Xeon Faster Than AMD EPYC Turin Using Proper Optimizations

Some of the big advantages that the Intel 3 process node brings to the table are denser design libraries, increased transistor drive current, and increased use of EUV. The node also comes in three variations including 3-T, 3-E, and 3-PT. The first two variations have the same +18% performance per watt improvement over Intel 4 while PT brings added performance and is easy to use. All four node variations feature support for 240nm high-performance and 210nm high-density libraries.

They also have a range of specific features such as Through-Si Via on 3/3-T, 1.2V native and Deep N-well support for 3-E & 9um pitch TSV, and hybrid bonding support on 3-PT which extends upon 3-E. The 3/3-T node will be serving the server, client, and base-die applications while 3-E targets the chipset and storage market. Lastly, 3-PT will serve the AI/HPC applications and general compute products.

Press Release: At Intel Foundry, we are dedicated to harnessing innovative technologies to extend Moore’s Law and put greater capabilities into the hands of customers for exciting new applications.

For decades, we have led the industry with transistor technologies at key inflection points, including the introduction of strained silicon in 2005, the high-k and

Read more on wccftech.com