Intel’s Next-Gen Xeon 6900P “Granite Rapids” CPU With 120 P-Cores & 744 MB Cache Spotted, Running On Dual-Socket Platform With 240 P-Cores

Intel's next-generation Granite Rapids "Xeon 6900" CPU has been spotted in Geekbench with 120 P-Cores and loads of cache.

Intel Granite Rapids "Xeon 6900P" Leak Shows 120 P-Core CPU With 504 MB L3 Cache Running On Dual-Socket Platform

The CPU was spotted within the Geekbench 6 benchmark database and ran on the Intel AvenueCity RVP (Reference Evaluation Platform) which features two LGA 7529 sockets & a load of DDR5 DIMM slots. The chip itself is an engineering sample which we will explain why.

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Starting with the specifications, the leaked Intel Granite Rapids "Xeon 6900P" CPU features 120 cores and 240 threads. The chip was running at a base clock of 1.80 GHz and features 240 MB of total L2 and 504 MB of total L3 cache.

The two combined give us 744 MB of cache which is a huge bump over the Emerald Rapids chips which packed 128 MB of L2 & 320 MB of L3 cache for a total of 448 MB combined cache. This is a 66% improvement in total, 57.5% in L3, and 2x in L2 cache count. The following is a comparison between the cache count of the top Granite Rapids, Emerald Rapids, and Sapphire Rapids SKUs:

• Granite Rapids (TOP SKU): 128 Cores / 256 Threads / 504 MB L3 / 256 MB L2 / 760 MB Total
• Emerald Rapids (TOP SKU): 64 Cores / 128 Threads / 320 MB L3 / 128 MB L2 / 448 MB Total
• Sapphire Rapids (TOP SKU): 56 Cores / 112 Threads / 105 MB L3 / 112 MB L2 / 217 MB Total

Now the reason why this is an engineering sample is because the CPU specs of this part match the Xeon 6979P "Granite Rapids" SKU which was leaked a few days ago. That chip features a 2.10 GHz base clock and a 500W TDP. An ES part of this variant is likely being used here & checking the logs, we can confirm that this chip wasn't running at its maximum boost clocks but instead only ran at its 1.8 GHz base frequency. Given the ES nature of this chip, the performance should be dismissed as it doesn't reflect the final product.

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