AMD Strix Point “Ryzen 9” APU With 12 Zen 5 Cores, 24 MB L3 Cache Spotted, Impressive Multi-Core Score Despite 1.4 GHz ES Clock

An engineering sample of AMD's Zen 5-based Strix Point "Ryzen 9" APU with 12 cores, 24 threads, and 24 MB of L3 cache has been spotted at Geekbench.

AMD's Early Engineering Sample of The Ryzen 9 "Strix Point" APU With Zen 5 Cores Boasts Impressive Multi-Thread Score Despite Low Clocks

The engineering sample was spotted within the Geekbench database and has the specific OPN ID of "100-000000994-14_N". This ID can be confirmed as an AMD Strix Point APU since it has already shown up multiple times, once last year in the MilkyWay@home database and more recently in the shipping manifestos which pointed it out as a Strix Point (1) chip rated at a TDP of 28W & designed for the FP8 platform for mobility platforms.

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The CPU was running on a Xen Virtual Machine and it should be pointed out that due to the early nature of the chip and little support within the Geekbench database, most of the details are either missing or not correctly pointed out. The chip is correctly identified as an "AuthenticAMD Family 26 Model 32 Stepping 0" part.

To start, the AMD Strix Point "Ryzen 9" APU features a total of 12 cores based on the Zen 5 core architecture with 24 threads. This is the fastest configuration that we will see for Strix Point (1) SKUs. The chip is listed with 16 MB of L3 cache and 1 MB of L2 cache but we know that there's a mix of Zen 5 and Zen 5C cores which means that this is only the Zen 5 (classic) core count listed. The chip itself should feature a total of 24 MB L3 cache.

As for the L2 cache, it should be the same across all cores so 12 MB of L2 (1 per core). Furthermore, the L1 Instruction cache is listed at 32 KB while the L1 data cache is listed at 48 KB. The data cache has seen a 50% bump versus Zen 4 cores while the instruction cache remains the same.

The AMD Strix Point "Ryzen 9" APU is listed with a core clock of 2.00 GHz but the log file shows that